Figure 1: Block diagram of a medical stimulation device using external memory to support advanced functionality
The first challenge for system architects is to identify the right system on chip (SoC) or microcontroller to serve as the heart of the system. It must be capable of providing the desired performance while simultaneously reducing the overall system’s power budget.
Peripheral devices, such as external memories, sensors, and telemetry interfaces must be comparable with the SoC/microcontroller performance, while also supporting a compact form factor and efficient power consumption.
Memory choices
The chosen device generally integrates two types of memories, flash and SRAM.
Flash is a relatively slow-write, non-volatile memory that supports a limited number of write cycles. It is used to hold fixed or slow-changing data such as application code, system information, and/or post-processed user data logs.
SRAM is a fast-access, volatile memory that provides unlimited write cycle endurance. It is used to store temporary run-time system data.
As system complexity increases, so does code complexity for the multiple mathematical functions and algorithms. Internal on-chip memory capacity may be insufficient. Portable medical systems often need additional storage, requiring designers to augment internal memory with external memory (Figure 1).
A low power external memory can be used for RAM expansion, typically an SRAM with extremely low active and standby current. Options for non-volatile storage include flash, EEPROM, MRAM, and F-RAM.
Serial flash memory is used for non‑volatile program and data storage expansion because of its low cost and the availability of high densities. However, it has relatively high energy consumption, which reduces the operating life of battery-based devices.
Some applications replace a portion of the memory with an EEPROM, but this is still not battery-friendly, especially when operations involve extensive writes to the EEPROM. It also complicates application code design.
Magneto-resistive RAM (MRAM) has unlimited write endurance. Its disadvantage, however, is that it consumes very high active and standby currents and is susceptible to magnetic fields which can corrupt stored data. These characteristics therefore make it unsuitable in battery-operated medical devices.
Ferroelectric RAM (F-RAM), has several key advantages in portable medical devices and it has high write‑cycle endurance.
Medical complications
Figure 2: Energy consumption per 4Mb write (µJ) for non-volatile memory technologies
The limited write endurance of EEPROM and flash creates potential issues for medical devices that need to store data logs that are constantly being updated. Flash offers endurance on the order of 1E+5 and EEPROM is 1E+6. The F-RAM write cycle endurance is 1E+14 (or 100 trillion). This enables devices to be able to log more data without having to implement complex wear-levelling algorithms and over‑provision additional capacity (Figure 3).
A second advantage is that the internal architecture of F‑RAM consumes orders of magnitude lower active energy than charge‑based flash or EEPROM storage devices (Figure 2).
For example, Excelon F‑RAMs from Cypress support standby, deep power down and hibernate idle modes. Implementing these into an application can reduce power consumption by approximately two orders of magnitude in combination with the lower active power mode.
Figure 3: Endurance cycle comparison for non‑volatile memory technologies
EEPROM and flash require additional page-program/page-write cycle times, thus increasing system active time for write operations. F‑RAM’s immediate non‑volatility allows battery-operated systems to completely switch off the power supply or more quickly drop the system into a low power idle mode to reduce both active time and active current.
This also enhances reliability in applications that have precise timing requirements where data is at risk during a power fault. F‑RAM cells are also highly tolerant to various types of radiation, including x‑rays and gamma radiation and are immune to magnetic fields, to protect recorded data.
Some F‑RAM devices, such as Excelon LP, provide on‑chip error correction code (ECC) which can detect and correct single‑bit errors in every 64‑bit data word, increasing critical system data logs’ storage reliability. F‑RAM also supports controlled peak current (ie inrush current control less than 1.5 mA) to prevent excessive discharge of the battery.
F‑RAM can be housed in packaging that is space‑efficient. For example, the Excelon LP offers up to 8Mbit and is available in industry standard eight‑pin SOIC and miniature eight-pin GQFN packages with throughput up to 50MHz SPI I/O and 108MHz QSPI (Quad‑SPI) I/O.
F‑RAM’s virtually infinite endurance, instant non‑volatility and low power consumption allow system designers to combine both RAM‑ and ROM‑based data and functions within a single memory.
ROM‑based technologies, including mask‑ROM, OTP‑EPROM, and NOR‑flash, are non‑volatile and are oriented toward code storage applications.
NAND‑flash and EEPROM can also serve as non‑volatile data memory. These all require some compromise, since they perform both code and data storage with low-performance compared to alternative memories.
These technologies focus on lower cost, which requires a trade-off of ease of use and/or performance.
RAM-based technologies serve as data memory and also as a working space for code execution when executing from flash proves too slow. RAM provides a blend of code and data functionality, but its volatile nature limits its use to temporary storage.
Portable applications require optimised performance in as few components as possible.
Using multiple memory types can lead to inefficiencies, complicates code design and typically consumes more energy.
The efficiency and reliability of F‑RAM makes it possible for a single memory technology to handle both code and data.
It has the endurance to support high frequency data logging while lowering system cost, increasing system efficiency and reducing system complexity.
